File under Integrated Circuits, IC28
2000Jul26
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Philips SemiconductorsPreliminary Specification
Single-chip 8-bit microcontroller with CAN controller
P8xC591
CONTENTS171FEATURES
181.180C51 Related Features of the 8xC59118.11.2CAN Related Features of the 8xC59118.22GENERAL DESCRIPTION18.33ORDERING INFORMATION194BLOCK DIAGRAM205FUNCTIONAL DIAGRAM20.120.26PINNING INFORMATION20.36.1Pinning diagram20.46.2Pin description
20.57MEMORY ORGANIZATION217.1Program Memory21.17.2Addressing
21.27.3Expanded Data RAM addressing21.37.4Dual DPTR21.48I/O FACILITIES
229OSCILLATOR CHARACTERISTICS22.110RESET
2311LOW POWER MODES2411.1Stop Clock Mode2511.2Idle Mode
25.111.3Power-down Mode
2612CAN, CONTROLLER AREA NETWORK26.112.1Features of the PeliCAN controller26.212.2PeliCAN structure
12.3Communication between PeliCAN controller27and CPU
2812.4Register and Message Buffer description28.112.5CAN Registers2913SERIAL I/O
30
14SIO0STANDARDSERIALINTERFACEUART14.1Multiprocessor Communications14.2Serial Port Control Register14.3Baud Rate Generation14.4More about UART Modes14.5Enhanced UART15SIO1, I2C SERIAL IO
15.1Modes of Operation
15.2SIO1 Implementation and Operation
15.3Software Examples of SIO1 Service Routines16TIMER 2
16.1
Features of Timer 2
2000Jul262
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WATCHDOG TIMER (T3)
PULSE WIDTH MODULATED OUTPUTSPrescalerFrequencyControlRegister(PWMP)Pulse Width Register 0 (PWM0)Pulse Width Register 1 (PWM1)PORT 1 OPERATION
ANALOG-TO-DIGITAL CONVERTER (ADC)ADC features
ADC functional description
10-Bit Analog-to-Digital Conversion
10-Bit ADC Resolution and Analog SupplyPower Reduction ModesINTERRUPTS
Interrupt Enable Registers
Interrupt Enable and Priority RegistersInterrupt priorityInterrupt VectorsINSTRUCTION SETAddressing ModesLIMITING VALUESDC CHARACTERISTICSAC CHARACTERISTICSTiming symbol definitionsEPROM CHARACTERISTICSProgram verificationSecurity bits
PACKAGE OUTLINESSOLDERING
Plastic leaded-chip carriers/quad flat-packsDEFINITIONS
LIFE SUPPORT APPLICATIONS
Philips SemiconductorsPreliminary Specification
Single-chip 8-bit microcontroller with CAN controller
P8xC591
1FEATURES
1.1
80C51 Related Features of the 8xC591
•Full static 80C51 Central Processing Unit available asOTP, ROM and ROMless•16 Kbytes internal Program Memory expandableexternally to 64 Kbytes•512 bytes on-chip Data RAM expandable externally to64Kbytes•Three 16-bit timers/counters T0, T1 (standard 80C51)and additional T2 (capture & compare)•10-bit ADC with 6 multiplexed analog inputs with fast8-bit ADC option•Two 8-bit resolution, Pulse Width Modulated outputs•32 I/O port pins in the standard 80C51 pinout•I2C-bus serial I/O port with byte oriented master andslave functions•On-chip Watchdog Timer T3
•Extended temperature range:−40to+85°C•Accelerated (prescaler 1:1) instruction cycle time500ns@12MHz•Operation voltage range: 5V±5%•Security bits:
–ROM version has 2 bits–OTP/EPROM version has 3 bits•32 bytes Encryption array
•4 level priority interrupt, 15 interrupt sources•Full-duplex enhanced UART with programmableBaudrate Generator•Power Control Modes:
–Clock can be stopped and resumed–Idle Mode–Power-down Mode•ADC active in Idle Mode•Second DPTR register•ALE inhibit for EMI reduction
•Programmable I/O port pins (pseudo bi-directional,push-pull, high impedance, open drain)•Wake-up from Power-down by external interrupts•Software reset bit (AUXR1.5)•Low active reset pin•Power-on detect reset•Once mode
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1.2
CAN Related Features of the 8xC591
•CAN 2.0B active controller, supporting 11-bit Standardand 29-bit Extended indentifiers•1 Mbit/s CAN bus speed with 8MHz clock achievable•64 byte receive FIFO (can capture sequential DataFrames from thesame source as required by the
TransportLayerofhigherprotocolssuchasDeviceNet,CANopen and OSEK)•13 byte transmit buffer
•EnhancedPeliCANcore(fromtheSJA1000stand-aloneCAN2.0B controller)1.2.1
PELICANFEATURES
•Four independently configurable Screeners(Acceptance Filters)•Each Screener has two 32-bit specifies:–32-bit Match and–32-bit Mask
•32-bits of Maskper Screener allowsunique Groupaddressing perScreener•HigherlayerprotocolsespeciallysupportedinStandardCAN format with:–Up to four, 11-bit ID Screeners that also Screen thetwo (2) Data Bytes–i.e.,DataFramesareScreenedbytheCANIDandbyData Byte content•Up to eight, 11-bit ID Screeners half of whichalsoScreen thefirst Data Byte•All Screeners are changeable “on the fly”•Listen Only Mode, Self Test Mode
•ErrorCodeCapture,ArbitrationLostCapture,readableError Counters
3
Philips SemiconductorsPreliminary Specification
Single-chip8-bitmicrocontrollerwithCANcontroller
2
GENERAL DESCRIPTION
P8xC591
The temperature range includes (max. fCLK = 12MHz):•-40 to +85°C version, for general applicationsThe P8xC591 combines the functions of the P87C554(microcontroller) and the SJA1000 (stand-alone
CAN-controller) with the following enhanced features:•Enhanced CAN receive interrupt (level sensitive)•Extended acceptance filter
•Acceptance filter changeable “on the fly”.
The main differences between P8xC591 and P87C554are:
•CAN-controller on chip•6-input ADC•Low active Reset•44 leads.
The P8xC591 is a single-chip 8-bit-high-performancemicrocontroller,withon-chipCAN-controller,derivedfromthe 80C51 microcontroller family.
Itusesthepowerful80C51instructionsetandincludesthesuccessful PeliCAN functionality of the SJA1000 CANcontroller from Philips Semiconductors.
The fully static core provides extended power saveprovisions as the oscillator can be stopped and easilyrestartedwithoutlossofdata.Theimprovedinternalclockprescalerof1:1achievesa500nsinstructioncycletimeat12MHz external clock rate.
Figure1 shows a Block Diagram of the P8xC591. Themicrocontroller is manufactured in an advanced CMOSprocess, and is designed for use in automotive andgeneral industrial applications. In addition to the 80C51standard features, the device provides a number ofdedicated hardware functions for these applications.Two versions of the P8xC591 will be offered:•P83C591 (with ROM)•P87C591 (with OTP)
Hereafter these versions will be referred to as P8xC591.3
ORDERING INFORMATION
TYPE NUMBERP83C591VFAP87C591VFAP83C591VFBP87C591VFBPACKAGENAMEPLCC44QFP44DESCRIPTIONplastic leaded chip carrier; 44leadsplasticquadflatpackage;44leads(leadlength1.3mm);body10×10×1.75mmTEMPERATURERANGE (°C)VERSIONSOT187-2−40to+85SOT307-22000Jul264
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Philips SemiconductorsPreliminary Specification
Single-chip 8-bit microcontroller with CAN controller
4
BLOCK DIAGRAM
P8xC591
INT0INT1T0T1PSENRDEAALEWRhandbook, full pagewidthAVref+AVSSAN0 to 5PWM0PWM1RXDTXD80C51 CONFIGURABLE COREA0 to A7CPUCORETWO 16-BITTIMER/EVENTCOUNTERS(T0/T1)16 KBYTESPROGRAMMEMORY512 BYTESADCDATAMEMORYPWMUARTP8xC591VDDVSSXTAL1OSCILLATORXTAL2WATCHDOGTIMER (T3)PARALLELI/O PORTSCPUINTERFACE(SFRs)16-BIT TIMER/EVENTCOUNTER WITH CAPTURE(T2)I2C SERIALINTERFACECAN 2.0 BINTERFACERSTP0P1P2P3RT2T2CT0x/INTxCMSR0 to 5CMT0 to 1SDASCLTXDCRXDCMHI001Fig.1 Block diagram P8xC591.2000Jul265
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Philips SemiconductorsPreliminary Specification
Single-chip 8-bit microcontroller with CAN controller
5
FUNCTIONAL DIAGRAM
P8xC591
handbook, full pagewidthVDDXTAL1VSSalternative functionsXTAL2RSTEAPSENALE0123456701234567PORT 0AD0AD1AD2AD3AD4AD5AD6AD7RXDCTXDCADC0ADC1ADC2ADC3ADC4ADC5and data buslow order addressCANCT0I/INT2CT1I/INT3CT2I/INT4CT3I/INT5SCLI2CSDAPORT 1AVref+AVSSPWM0PWM1T2RT2CSMR0CSMR1CSMR2CSMR3RXDTXDINT0INT1T0T1WRRD01234567P8xC591(44-PIN)PORT 301234567MHI002PORT 2address busFig.2 Functional diagram.2000Jul266
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Philips SemiconductorsPreliminary Specification
Single-chip 8-bit microcontroller with CAN controller
66.1
PINNING INFORMATIONPinning diagram
P8xC591
6P1.4/ADC2/INT4/CT2I5P1.3/ADC1/INT3/CT1I4P1.2/ADC0/INT2/CT0I2P1.0/RXDC3P1.1/TXDC43P0.0/AD042P0.1/AD141P0.2/AD2handbook, full pagewidthCT3I/INT5/ADC3/P1.5SCL/ADC4/P1.6SDA/ADC5/P1.778940P0.3/AD344AVref+1AVSS39P0.4/AD438P0.5/AD537P0.6/AD636P0.7/AD735EA/VPPRST10T2/P3.0/RXD11PWM012RT2/P3.1/TXD13CMSR0/P3.2/INT014CMSR1/P3.3/INT115CMSR2/P3.4/T016CMSR3/P3.5/T117P8xC59134PWM133ALE/PROG32PSEN31P2.7/A1530P2.6/A1429P2.5/A13P3.6/WR18P3.7/RD19XTAL220XTAL121VSS22VDD23P2.0/A824P2.1/A925P2.2/A1026P2.3/A1127P2.4/A1228MHI003Fig.3 Pinning Diagram for 44-lead LCC Package.2000Jul267
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Philips SemiconductorsPreliminary Specification
Single-chip 8-bit microcontroller with CAN controllerP8xC591
44P1.4/ADC2/INT4/CT2I43P1.3/ADC1/INT3/CT1Ihandbook, full pagewidth42P1.2/ADC0/INT2/CT0I40P1.0/RXDC41P1.1/TXDC37P0.0/AD036P0.1/AD135P0.2/AD2P1.5/ADC3/INT5/CT3IP1.6/ADC4/SCLP1.7/ADC5/SDARSTP3.0/T2/RXDPWM0RT2/P3.1/TXDCMSR0/P3.2/INT0CMSR1/P3.3/INT112345678934P0.3/AD338AVref+39AVSS33P0.4/AD432P0.5/AD531P0.6/AD630P0.7/AD729EA/VPPP8xC59128PWM127ALE/PROG26PSEN25P2.7/A1524P2.6/A1423P2.5/A13CMSR2/P3.4/T010CMSR3/P3.5/T111P3.6/WR12P3.7/RD13XTAL214XTAL115VSS16VDD17P2.0/A818P2.1/A919P2.2/A1020P2.3/A1121P2.4/A1222MHI004Fig.4 Pinning Diagram for 44-lead Plastic Quad Flat Package (QFP).2000Jul268
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Philips SemiconductorsPreliminary Specification
Single-chip 8-bit microcontroller with CAN controller
6.2
Pin description
Pin description for QFP44/PLCC44, see Note1.
PINQFP444PLCC4410DESCRIPTIONP8xC591
Table 1
SYMBOLRSTP3.0to P3.7Reset:AInputtoresettheP8xC591.Italsoprovidesaresetpulseasoutputwhen Timer T3 overflows.Port3 (P3.0to P3.7): 8-bit programmable I/O port lines; Port 3 cansink/source 4 LSTTL inputs.Port 3 pins serve alternate functions as follows:P3.0/RXDP3.1/TXD571113141516171819RXD: Serial input port for UART;T2: T2 event inputTXD: Serial output port for UART;RT2: T2 timer reset signal. Rising edge triggered.INT0: External interrupt input 0;CMSR0: Compare and Set/Reset output for Timer T2.INT1: External interrupt input 1;CMSR1: Compare and Set/Reset output for Timer T2.T0: Timer 0 external interrupt input;CMSR2: Compare and Set/Reset output for Timer T2.T1: Timer 1 external interrupt input;CMSR3: Compare and Set/Reset output for Timer T2.WR: External Data Memory Write strobe;RD: External Data Memory Read strobe.During reset, Port 3 will be asynchronously driven resistive HIGH.Port 3 has four modes selected on a per bit basis by writing to the P3M1 andP3M2 registers as follows:P3M1.xP3M2.xMode Description00110101Pseudo-bidirectional (standard c51 configuration default)Push-PullHigh impedanceOpen drainP3.2/INT0/CMSR08P3.3/INT1/CMSR1P3.4/T0/CMSR2P3.5/T1/CMSR3P3.6/WRP3.7/RD910111213XTAL2XTAL114152021Crystal pin 2: output of the inverting amplifier that forms the oscillator. Leftopen-circuit when an external oscillator clock is used.Crystal pin 1: input to the inverting amplifier that forms the oscillator, andinput to the internal clock generator. Receives the external oscillator clocksignal when an external oscillator is used.Ground;circuit ground potential.Power supply;power supply pin during normal operation and powerreduction modes.VSSVDD161722232000Jul269
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Philips SemiconductorsPreliminary Specification
Single-chip 8-bit microcontroller with CAN controllerP8xC591
SYMBOLP2.0/A08toP2.7/A15PINQFP44PLCC44DESCRIPTION18to2524to31Port2 (P2.0toP2.7): 8-bit programmable I/O port lines;A08toA15: High-order address byte for external memory.Alternate function: High-order address byte for external memory (A08-A15).Port 2 is also used to input the upper order address during EPROMprogramming and verification. A8 is on P2.0, A9 on P2.1, through A12 onP2.4.During reset, Port 2 will be asynchronously driven HIGH.Port 2 has four output modes selected on a per bit basis by writing to theP2M1 and P2M2 registers as follows:P2M1.xP2M2.xMode Description00110101Pseudo-bidirectional (standard c51 configuration default)Push-PullHigh impedanceOpen drainPSEN2632Program Store Enable output: read strobe to the external Program Memoryvia Ports0 and 2. Is activated twice each machine cycle during fetches fromexternal Program Memory. When executing out of external Program Memorytwo activations ofPSEN are skipped during each access to external DataMemory.PSEN is not activated (remains HIGH) during no fetches fromexternal Program Memory.PSEN can sink/source 8LSTTL inputs. It candrive CMOS inputs without external pull-ups.Address Latch Enable output. Latches the low byte of the address duringaccess of external memory in normal operation. It is activated every sixoscillator periods except during an external Data Memory access. ALE cansink/source 8LSTTL inputs. It can drive CMOS inputs without an externalpull-up. To prohibit the toggling of ALE pin (RFI noise reduction) the bit A0(SFR: AUXR.0) must be set by software; see Table4.PROG:theprogramming pulse input; alternative function for the P87C591.External Access input. If, during reset,EA is held at a TTL level HIGH theCPUexecutesoutoftheinternalProgramMemory.If,duringreset,EAisheldat a TTL level LOW the CPU executes out of external Program Memory viaPort0 and Port2.EA is not allowed to float.EA is latched during reset anddon’t care after reset.VPP: the programming supply voltage; alternative function for the P87C591.ALE/PROG2733EA/VPP2935P0.0/AD0toP0.7/AD730to3736to43Port0: 8-bit open-drain bidirectional I/O port.Duringreset,Port0isHIGH-Impedance (Tri-State).AD7toAD0: Multiplexed Low-order address and Data bus for externalmemory. During these accesses internal pull-ups are activated. Port 0 cansink/source up to 8 LSTTL inputs.AVref+AVSS3839441Analog to Digital Conversion Reference Resistor: High-end.Analog ground.2000Jul2610
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分销商库存信息:
NXP
P87C591VFA/00,512
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